1. Field of the Invention
The invention relates to liquid crystal display panels, and in particular to the structure of array substrates thereof.
2. Description of the Related Art
Transmissive Liquid crystal displays (LCD) require a backlight module with high power consumption with limited display capability under intense environmental light. Reflective LCDs utilize a reflective electrode portion displacing the transparent electrode portion, without backlight module, which cannot be used in dark surroundings. Transflective LCDs combine the advantages of both and avoiding disadvantages thereof. For increased viewing angle, such LCDs are often integrated with multi-domain vertical alignment (MVA) technology, such as patterned vertical alignment (PVA) or advanced super V (ASV). In addition to a wide viewing angle, MVA-LCDs offer high contrast ratio and response speed, and other benefits. In MVA-LCDs, a plurality of alignment protrusions is defined on the array substrate or the color filter substrate. The liquid crystal alignment is divided into two, four, or more types by the angle of the alignment protrusions, referred to as automatic domain formation (ADF). The pattern of the alignment protrusions can comprise ribbed, zigzag, or rhomboid, and the cross-section of the alignment protrusions can include triangle, semicircle, or square.
FIG. 1 is a top view of a subpixel of a conventional transflective LCD panel. The array substrate of the panel has common lines 103A and gate lines 103B parallel to each other, and data lines 103C perpendicular to the common lines 103A and gate lines 103B constituting subpixels 101, defined between two common lines 103A and two data lines 103C, and a gate line 103B disposed between two common lines 103A. The gate line 103B connects to a thin film transistor (not shown) to drive the subpixel 101. Referring to FIG. 1, subpixel 101 is divided into reflective region 101A and transmission region 101B, which comprise reflective electrode portion 105A and transparent electrode portion 105B, respectively. The color filter substrate, corresponding to the array substrate, has alignment protrusions 104B to control liquid crystal alignment. Major slits 104A are formed between the reflective region 101A and the transmission region 101B to improve alignment. In addition, connection electrodes 105C are formed to electrically connect the reflective electrode portion 105A and transparent electrode portion 105B separated by the major slits 104A.
As shown in FIG. 1, in an array substrate fabricated by conventional low temperature poly silicon process, the major slit 104A overlaps the gate line 103A. The tilt angles of the liquid crystal molecules are different due to voltage differences of gate lines 103B and the common lines 103A. FIG. 2 shows a simulation of the liquid crystal molecules in bright status according to structure of FIG. 1. As shown in FIG. 2, the LCD panel includes reflection region 101A and transmission region 101B. The liquid crystal layer 109B is disposed between the color filter substrate 109A and the array substrate 109C. The color filter substrate 109A includes transparent substrate 115A, color filter 111, alignment protrusions 104B, and transparent photoresist layer 104C. The crystal layer 109B of the reflection region 101A can be thinner than the transparent photoresist layer 104C. The array substrate 109B includes transparent substrate 115B, common lines 103A and gate lines 103B in stacked circuit layer 113, and the uppermost layer reflective electrode portion 105A and transparent electrode portion 105B. The major slit 104A, between the reflective electrode portion 105A and the transparent electrode portion 105B, overlaps the gate line 103B. The liquid crystal molecules 108 in dotted circle 116A adjacent to the common line 103A are regularly arranged. The liquid crystal molecules 108 in dotted circle 116B adjacent to the gate line 103B and the major slit 104A are irregularly arranged, thereby reducing the liquid crystal effect.
Accordingly, a method of dissolving low liquid crystal effect due to high operating voltage of gate lines is called for in which known processes such as low temperature poly silicon are preferably retained.